rev 2.0 ?2010 advanced linear devices, inc. 415 tasman drive, sunnyvale, ca 94089-1706 tel: (408) 747-1155 fax: (408) 747-1286 www.aldinc.com quad micropower rail-to-rail cmos operational amplifier ald4701a/ald4701b ald4701 a dvanced l inear d evices, i nc. operating temperature range 0 c to +70 c0 c to +70 c -55 c to 125 c 14-pin 14-pin 14-pin small outline plastic dip cerdip package (soic) package package ald4701asbl ald4701apbl ald4701adb ald4701bsbl ald4701bpbl ald4701bdb ald4701sbl ALD4701PBL ald4701db * contact factory for leaded (non-rohs) or high temperature versions. ordering information (?l? suffix denotes lead-free (rohs)) general description the ald4701a/ald4701b/ald4701 is a quad monolithic cmos micropower high slew rate operational amplifier intended for a broad range of analog applications using 1v to 5v dual power supply systems, as well as +2v to +10v battery operated systems. all device characteristics are specified for +5v single supply or 2.5v dual supply systems. total supply current for all four operational amplifiers is 1ma maximum at 5v supply voltage. it is manufactured with advanced linear devices' enhanced acmos silicon gate cmos process. the ald4701a/ald4701b/ald4701 is designed to offer a trade-off of performance parameters providing a wide range of desired specifications. it has been developed specifically for the +5v single supply or 1v to 5v dual supply user and offers the popular industry standard pin configuration of lm324 types and icl7641 types. several important characteristics of the device make application easier to implement at these voltages. first, each operational amplifier can operate with rail to rail input and output voltages. this means the signal input voltage and output voltage can be equal to or near to the positive and negative supply voltages. this feature allows numerous analog serial stages and flexibility in input signal bias levels. second, each device was designed to accommodate mixed applications where digital and analog circuits may operate off the same power supply or battery. third, the output stage can typically drive up to 50pf capacitive and 10k ? resistive loads. these features, combined with extremely low input currents, high open loop voltage gain of 100v/mv, useful bandwidth of 700khz, a slew rate of 0.7v/ s, low power dissipation of 5mw, low offset voltage and temperature drift, make the ald4701a/ald4701b/ald4701 a versatile, micropower quad operational amplifier. the ald4701a/ald4701b/ald4701, designed and fabricated with silicon gate cmos technology, offers 1pa typical input bias current. due to low voltage and low power operation, reliability and operating characteristics, such as input bias currents and warm up time, are greatly improved. additionally, robust design and rigorous screening make this device especially suitable for operation in temperature-extreme environments and rugged conditions. applications ? voltage follower/buffer/amplifier ? charge integrator ? photodiode amplifier ? data acquisition systems ? high performance portable instruments ? signal conditioning circuits ? sensor and transducer amplifiers ? low leakage amplifiers ? active filters ? sample/hold amplifier ? picoammeter ? current to voltage converter features ? all parameters specified for +5v single supply or 2.5v dual supply systems ? rail-to-rail input and output voltage ranges ? unity gain stable ? extremely low input bias currents -- 1.0pa ? high source impedance applications ? dual power supply 1.0v to 5.0v ? single power supply +2v to +10v ? high voltage gain ? output short circuit protected ? unity gain bandwidth of 0.7mhz ? slew rate of 0.7v/ s ? low power dissipation ? symmetrical output drive ? suitable for rugged, temperature-extreme environments pin configuration top view sbl, pbl, db packages out d -in d +in d v- +in c -in c out c out a -in a +in a v + +in b -in b out b 1 2 3 4 5 6 7 8 9 10 11 12 13 14
ald4701a/ald4701b advanced linear devices 2 of 9 ald4701 absolute maximum ratings supply voltage, v + 10.6v differential input voltage range -0.3v to v + +0.3v power dissipation 600 mw operating temperature range sbl, pbl packages 0 c to +70 c db package -55 c to +125 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment. supply v s 1.0 5.0 1.0 5.0 1.0 5.0 v dual supply voltage v + 2.0 10.0 2.0 10.0 2.0 10.0 v single supply input offset v os 2.0 5.0 10.0 mv r s 100k ? voltage 2.8 5.8 11.0 mv 0 c t a +70 c input offset i os 1.0 25 1.0 25 1.0 25 pa t a = 25 c current 240 240 240 pa 0 c t a +70 c input bias i b 1.0 30 1.0 30 1.0 30 pa t a = 25 c current 300 300 300 pa 0 c t a +70 c input voltage v ir -0.3 5.3 -0.3 5.3 -0.3 5.3 v v + = +5 range -2.8 2.8 -2.8 2.8 -2.8 2.8 v v s = 2.5v input r in 10 12 10 12 10 12 ? resistance input offset tcv os 557 v/ cr s 100k ? voltage drift power supply psrr 65 80 65 80 60 80 db r s 100k ? rejection ratio 65 80 65 80 60 80 db 0 c t a +70 c common mode cmrr 65 83 65 83 60 83 db r s 100k ? rejection ratio 65 83 65 83 60 83 db 0 c t a +70 c large signal a v 15 100 15 100 10 80 v/mv r l = 100k ? voltage gain 300 300 300 v/mv r l 1m ? 10 10 7 v/mv r l = 100k ? 0 c t a +70 c output v o low 0.001 0.01 0.001 0.01 0.001 0.01 v r l = 1m ? v + = +5v voltage v o high 4.99 4.999 4.99 4.999 4.99 4.999 v 0 c t a +70 c range v o low -2.48 -2.40 -2.48 -2.40 -2.48 -2.40 v r l = 100k ? v o high 2.40 2.48 2.40 2.48 2.40 2.48 v 0 c t a +70 c output short i sc 111ma circuit current supply i s 490 1000 490 1000 490 1000 av in = 0v current no load power p d 5.0 5.0 5.0 mw both amplifiers dissipation v s = 2.5v operating electrical characteristics t a = 25 c v s = 2.5v unless otherwise specified 4701a 4701b 4701 test parameter symbol min typ max min typ max min typ max unit conditions
ald4701a/ald4701b advanced linear devices 3 of 9 ald4701 operating electrical characteristics (cont'd) v s = 2.5v -55 c t a +125 c unless otherwise specified 4701ada 4701bda 4701da test parameter symbol min typ max min typ max min typ max unit conditions input offset v os 3.0 6.0 15.0 mv r s 100k ? voltage input offset i os 8.0 8.0 8.0 na current input bias i b 10.0 10.0 10.0 na current power supply psrr 60 75 60 75 60 75 db r s 100k ? rejection ratio common mode cmrr 60 83 60 83 60 83 db r s 100k ? rejection ratio large signal a v 10 50 10 50 7 50 v/mv r l 100k ? voltage gain output voltage v o low -2.47 -2.40 -2.47 -2.40 -2.47 -2.40 v range v o high 2.35 2.45 2.35 2.45 2.35 2.45 v r l 100k ? t a = 25 c v s = 5.0v unless otherwise specified 4701a 4701b 4701 test parameter symbol min typ max min typ max min typ max unit conditions power supply psrr 83 83 83 db r s 100k ? rejection ratio common mode cmrr 83 83 83 db r s 100k ? rejection ratio large signal a v 250 250 250 v/mv r l = 100k ? voltage gain output voltage v o low -4.98 -4.90 -4.98 -4.90 -4.98 -4.90 v r l = 100k ? range v o high 4.90 4.98 4.90 4.98 4.90 4.98 v bandwidth b w 1.0 1.0 1.0 mhz slew rate s r 1.0 1.0 1.0 v/ sa v = +1 c l = 50pf input c in 111pf capacitance bandwidth b w 700 700 700 khz slew rate s r 0.7 0.7 0.7 v/ sa v = +1 r l = 100k ? rise time t r 0.2 0.2 0.2 sr l = 100k ? overshoot 20 20 20 % r l = 100k ? factor c l = 50pf settling t s 10.0 10.0 10.0 s0.1% time a v = -1 c l = 50pf r l = 100k ? channel c s 120 120 120 db a v = 100 separation t a = 25 c v s = 2.5v unless otherwise specified 4701a 4701b 4701 test parameter symbol min typ max min typ max min typ max unit conditions
ald4701a/ald4701b advanced linear devices 4 of 9 ald4701 typical performance characteristics input bias current as a function of ambient temperature ambient temperature ( c) 1000 100 10 0.1 1.0 input bias current (pa) 100 -25 0 75 125 50 25 -50 10000 v s = 2.5v open loop voltage gain as a function of load resistance 10m load resistance ( ? ) 10k 100k 1m 1000 100 10 1 open loop voltage gain (v/mv) v s = 2.5v t a = 25 c common mode input voltage range as a function of supply voltage supply voltage (v) common mode input voltage range (v) 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 t a = 25 c design & operating notes: 1. the ald4701a/ald4701b/ald4701 cmos operational amplifier uses a 3 gain stage architecture and an improved frequency compensation scheme to achieve large voltage gain, high output driving capability, and better frequency stability. in a conventional cmos operational amplifier design, compensation is achieved with a pole splitting capaci- tor together with a nulling resistor. this method is, however, very bias dependent and thus cannot accommodate the large range of supply voltage operation as is required from a stand alone cmos operational amplifier. the ald4701a/ald4701b/ald4701 is internally compen- sated for unity gain stability using a novel scheme that does not use a nulling resistor. this scheme produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the unity gain frequency. 2. the ald4701a/ald4701b/ald4701 has complementary p-channel and n-channel input differential stages connected in parallel to accom- plish rail-to-rail input common mode voltage range. this means that with the ranges of common mode input voltage close to the power supplies, one of the two differential stages is switched off internally. to maintain compatibility with other operational amplifiers, this switching point has been selected to be about 1.5v below the positive supply voltage. since offset voltage trimming on the ald4701a/ald4701b/ ald4701 is made when the input voltage is symmetrical to the supply voltages, this internal switching does not affect a large variety of applications such as an inverting amplifier or non-inverting amplifier with a gain larger than 2.5 (5v operation), where the common mode voltage does not make excursions above this switching point. the user should however, be aware that this switching does take place if the operational amplifier is connected as a unity gain buffer and should make provision in his design to allow for input offset voltage variations. 3. the input bias and offset currents are essentially input protection diode reverse bias leakage currents, and are typically less than 1pa at room temperature. this low input bias current assures that the analog signal from the source will not be distorted by input bias currents. normally, this extremely high input impedance of greater than 10 12 ? would not be a problem as the source impedance would limit the node impedance. however, for applications where source impedance is very high, it may be necessary to limit noise and hum pickup through proper shielding. 4. the output stage consists of class ab complementary output drivers, capable of driving a low resistance load. the output voltage swing is limited by the drain to source on-resistance of the output transistors as determined by the bias circuitry, and the value of the load resistor. when connected in the voltage follower configuration, the oscillation resistant feature, combined with the rail to rail input and output feature, makes an effective analog signal buffer for medium to high source impedance sensors, transducers, and other circuit networks. 5. the ald4701a/ald4701b/ald4701 operational amplifier has been designed to provide full static discharge protection. internally, the design has been carefully implemented to minimize latch up. however, care must be exercised when handling the device to avoid strong static fields that may degrade a diode junction, causing increased input leakage currents. in using the operational amplifier, the user is advised to power up the circuit before, or simultaneously with, any input voltages applied and to limit input voltages not to exceed 0.3v of the power supply voltage levels. 6. the ald4701a/ald4701b/ald4701, with its micropower operation, offers numerous benefits in reduced power supply requirements, less noise coupling and current spikes, less thermally induced drift, better overall reliability due to lower self heating, and lower input bias current. it requires practically no warm up time as the chip junction heats up to only 0.4 c above ambient temperature under most operating condi- tions. supply current ( a) supply current as a function of supply voltage supply voltage (v) 1600 800 1200 0 400 0 1 2 3 4 5 6 t a = -55 c +25 c +70 c +125 c inputs grounded output unloaded -25 c
ald4701a/ald4701b advanced linear devices 5 of 9 ald4701 input offset voltage as a function of common mode input voltage common mode input voltage (v) -2 -1 0 +1 +3 +2 15 10 5 -5 -10 0 -15 input offset voltage (mv) v s = 2.5v t a = 25 c large - signal transient response 2v/div 500mv/div 5 s/div v s = 1.0v t a = 25 c r l = 100k ? c l = 50pf large - signal transient response 5v/div 2v/div 5 s/div v s = 2.5v t a = 25 c r l = 100k ? c l = 50pf input offset voltage as a function of ambient temperature representative units ambient temperature ( c) input offset voltage (mv) -50 -25 0 +25 +50 +75 +100 +125 +4 +5 +3 +1 +2 0 -2 -1 -4 -3 -5 v s = 2.5v open loop voltage gain as a function of frequency frequency (hz) 1 10 100 1k 10k 1m 10m 100k 120 100 80 60 40 20 0 -20 open loop voltage gain (db) 90 0 45 180 135 phase shift in degrees v s = 2.5v t a = 25 c small - signal transient response 100mv/div 20mv/div 2 s/div v s = 2.5v t a = 25 c r l = 100k ? c l = 50pf typical performance characteristics (cont'd) output voltage swing as a function of supply voltage supply voltage (v) 0 1 2 3 4 7 6 5 6 5 4 3 2 1 output voltage swing (v) -55 c t a +125 c r l = 100k ? open loop voltage gain as a function of supply voltage and temperature supply voltage (v) 1000 100 10 1 open loop voltage gain (v/mv) 0 2 4 6 8 -55 c t a +125 c r l = 100k ?
ald4701a/ald4701b advanced linear devices 6 of 9 ald4701 typical applications function generator 100k 100k 10k 12 13 14 54k 220k 8 9 7 5 6 100k 100k 10k 1 3 2 27k .01 f +2.5v -2.5v 100k 4 11 0.1 f square wave triangle wave 0.002 f - + - + - + - + vout -2x gain 27k 27k 10 0.002 f sine wave 1/4 ald4701 1/4 ald4701 1/4 ald4701 1/4 ald4701 triangle wave square wave high input impedance rail-to-rail precision dc summing amplifier photo detector current to voltage converter v- = - 2.5v 10m 10m 10m 10m 10m 10m r in = 10m ? accuracy limited by resistor tolerances and input offset voltage v+ = +2.5v - + 0.1 f 0.1 f v out v- v in v+ v- v out v+ v 1 v 4 v 3 v 2 v out = v 1 + v 2 - v 3 - v 4 1/4 ald4701 + - +2.5v -2.5v r f = 5m i photodiode v out = 1 x r f r l = 100k 1/4 ald4701 rail-to-rail voltage follower/buffer transconductance amplifier - + v out 5v 0.1 f 0 v in 5v v in z in = 10 12 ? ~ 1/4 ald4701 - + 1/4 ald4701 v in r in = 10 12 ? +5v r l r 2 v out i out i out = v in r 2 min max min max 1k 0.0 2.00 0.0 4.00 10k 0.0 2.45 0.0 4.90 r l = r 2 v in v out rail-to-rail window comparator wien bridge oscillator (rail-to-rail) sine wave generator 10k 10k 10k +5v -5v .01 f c = .01 f r = 10k - + 1/4 ald4701 f = 1 = 1.6khz 2 rc ~~ v out +5v + - + - v in 100k 100k v ref (high) v ref (low) 3 2 5 6 8 4 1 7 1/4 74 c00 1/4 ald4701 1/4 ald4701 v out v out (low) for v ref (low) < v in < v ref (high)
ald4701a/ald4701b advanced linear devices 7 of 9 ald4701 millimeters inches min max min max dim a a 1 b c d-14 e e h l s 1.75 0.25 0.45 0.25 8.75 4.05 6.30 0.937 8 0.50 0.053 0.004 0.014 0.007 0.336 0.140 0.224 0.024 0 0.010 0.069 0.010 0.018 0.010 0.345 0.160 0.248 0.037 8 0.020 1.27 bsc 0.050 bsc 1.35 0.10 0.35 0.18 8.55 3.50 5.70 0.60 0 0.25 ? 14 pin plastic soic package soic-14 package drawing e d e a a 1 b s (45 ) l c h s (45 ) ?
ald4701a/ald4701b advanced linear devices 8 of 9 ald4701 14 pin plastic dip package pdip-14 package drawing b 1 d s b e a 2 a 1 a l e e 1 c e 1 ? millimeters inches min max min max dim a a 1 a 2 b b 1 c d-14 e e 1 e e 1 l s-14 ? 3.81 0.38 1.27 0.89 0.38 0.20 17.27 5.59 7.62 2.29 7.37 2.79 1.02 0 5.08 1.27 2.03 1.65 0.51 0.30 19.30 7.11 8.26 2.79 7.87 3.81 2.03 15 0.105 0.015 0.050 0.035 0.015 0.008 0.680 0.220 0.300 0.090 0.290 0.110 0.040 0 0.200 0.050 0.080 0.065 0.020 0.012 0.760 0.280 0.325 0.110 0.310 0.150 0.080 15
ald4701a/ald4701b advanced linear devices 9 of 9 ald4701 e e 1 c e 1 ? d s b 1 e b l a l 2 a 1 l 1 a a 1 b b 1 c d-14 e e 1 e e 1 l l 1 l 2 s ? 3.55 1.27 0.97 0.36 0.20 -- 5.59 7.73 3.81 3.18 0.38 -- 0 5.08 2.16 1.65 0.58 0.38 19.94 7.87 8.26 5.08 -- 1.78 2.49 15 millimeters inches min max min max dim 0.140 0.050 0.038 0.014 0.008 -- 0.220 0.290 0.150 0.125 0.015 -- 0 0.200 0.085 0.065 0.023 0.015 0.785 0.310 0.325 0.200 -- 0.070 0.098 15 2.54 bsc 7.62 bsc 0.100 bsc 0.300 bsc 14 pin cerdip package cerdip-14 package drawing
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